Datasheet

1099
SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
40.7.48 PWM Channel Mode Update Register
Name: PWM_CMUPDx [x=0..3]
Address: 0x40000400 [0], 0x40000420 [1], 0x40000440 [2], 0x40000460 [3]
Access: Read/Write
This register can only be written if bits WPSWS2 and WPHWS2 are cleared in the PWM Write Protection Status Register.
This register acts as a double buffer for the CPOL value. This prevents an unexpected waveform when modifying the polar-
ity value.
 CPOLUP: Channel Polarity Update
The write of this bit is taken into account only if the bit CPOLINVUP is written at ‘0’ at the same time.
0: The OCx output waveform (output from the comparator) starts at a low level.
1: The OCx output waveform (output from the comparator) starts at a high level.
 CPOLINVUP: Channel Polarity Inversion Update
If this bit is written at ‘1’, the write of the bit CPOLUP is not taken into account.
0: No effect.
1: The OCx output waveform (output from the comparator) is inverted.
31 30 29 28 27 26 25 24
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23 22 21 20 19 18 17 16
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15 14 13 12 11 10 9 8
– – CPOLINVUP – – – CPOLUP –
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