Datasheet

1089
SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
40.7.39 PWM Comparison x Mode Update Register
Name: PWM_CMPMUPDx
Address: 0x4000013C [0], 0x4000014C [1], 0x4000015C [2], 0x4000016C [3], 0x4000017C [4], 0x4000018C [5],
0x4000019C [6], 0x400001AC [7]
Access: Write-only
This register acts as a double buffer for the CEN, CTR, CPR and CUPR values. This prevents an unexpected comparison
x match.
 CENUPD: Comparison x Enable Update
0: The comparison x is disabled and can not match.
1: The comparison x is enabled and can match.
 CTRUPD: Comparison x Trigger Update
The comparison x is performed when the value of the comparison x period counter (CPRCNT) reaches the value defined
by CTR.
 CPRUPD: Comparison x Period Update
CPR defines the maximum value of the comparison x period counter (CPRCNT). The comparison x value is performed
periodically once every CPR+1 periods of the channel 0 counter.
 CUPRUPD: Comparison x Update Period Update
Defines the time between each update of the comparison x mode and the comparison x value. This time is equal to
CUPR+1 periods of the channel 0 counter.
31 30 29 28 27 26 25 24
––––––––
23 22 21 20 19 18 17 16
–––– CUPRUPD
15 14 13 12 11 10 9 8
–––– CPRUPD
76543210
CTRUPD – – – CENUPD