Datasheet

1087
SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
40.7.37 PWM Comparison x Value Update Register
Name: PWM_CMPVUPDx
Address: 0x40000134 [0], 0x40000144 [1], 0x40000154 [2], 0x40000164 [3], 0x40000174 [4], 0x40000184 [5],
0x40000194 [6], 0x400001A4 [7]
Access: Write-only
This register acts as a double buffer for the CV and CVM values. This prevents an unexpected comparison x match.
Only the first 16 bits (channel counter size) of field CV
UPD are significant.
 CVUPD: Comparison x Value Update
Define the comparison x value to be compared with the counter of the channel 0.
 CVMUPD: Comparison x Value Mode Update
0: The comparison x between the counter of the channel 0 and the comparison x value is performed when this counter is
incrementing.
1: The comparison x between the counter of the channel 0 and the comparison x value is performed when this counter is
decrementing.
Note: This bit is not relevant if the counter of the channel 0 is left-aligned (CALG = 0 in PWM Channel Mode Register)
CAUTION: The write of the register PWM_CMPVUPDx must be followed by a write of the register PWM_CMPMUPDx.
31 30 29 28 27 26 25 24
–––––––CVMUPD
23 22 21 20 19 18 17 16
CVUPD
15 14 13 12 11 10 9 8
CVUPD
76543210
CVUPD