Datasheet

1047
SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
 Register group 3:
̶ PWM Spread Spectrum Register
̶ PWM Spread Spectrum Update Register
̶ PWM Channel Period Register
̶ PWM Channel Period Update Register
 Register group 4:
̶ PWM Channel Dead Time Register
̶ PWM Channel Dead Time Update Register
 Register group 5:
̶ PWM Fault Mode Register
̶ PWM Fault Protection Value Register 1
There are two types of write protection:
 SW write protection—can be enabled or disabled by software
 HW write protection—can be enabled by software but only disabled by a hardware reset of the PWM
controller
Both types of write protection can be applied independently to a particular register group by means of the WPCMD
and WPRGx fields in the PWM_WPCR. If at least one type of write protection is active, the register group is write-
protected. The value of field WPCMD defines the action to be performed:
 0: Disables SW write protection of the register groups of which the bit WPRGx is at ‘1’
 1: Enables SW write protection of the register groups of which the bit WPRGx is at ‘1’
 2: Enables HW write protection of the register groups of which the bit WPRGx is at ‘1’
At any time, the user can determine whether SW or HW write protection is active in a particular register group by
the fields WPSWS and WPHWS in the PWM Write Protection Status Register (PWM_WPSR).
If a write access to a write-protected register is detected, the WPVS flag in the PWM_WPSR is set and the field
WPVSRC indicates the register in which the write access has been attempted.
The WPVS and WPVSRC fields are automatically cleared after reading the PWM_WPSR.