Datasheet

1041
SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
is triggered. The comparison x update period CUPR itself can be updated while the channel 0 is enabled by using
the PWM_CMPMUPDx register.
CAUTION:
The write of PWM_CMPVUPDx must be followed by a write of PWM_CMPMUPDx.
The comparison match and the comparison update can be source of an interrupt, but only if it is enabled and not
masked. These interrupts can be enabled by the PWM Interrupt Enable Register 2 and disabled by the PWM
Interrupt Disable Register 2. The comparison match interrupt and the comparison update interrupt are reset by
reading the PWM Interrupt Status Register 2.
Figure 40-17. Comparison Waveform
40.6.4 PWM Event Lines
The PWM provides 2 independent event lines intended to trigger actions in other peripherals (i.e. for the Analog-to-
Digital Converter (ADC )).
A pulse (one cycle of the peripheral clock) is generated on an event line, when at least one of the selected
comparisons is matching. The comparisons can be selected or unselected independently by the CSEL bits in the
PWM Event Line x Register (PWM_ELMRx for the Event Line x).
CCNT0
CVUPD 0x6 0x2
CVMVUPD
CV
0x6
0x2
0x6
0x6
CVM
Comparison Update
CMPU
CTRUPD 0x1 0x2
CPR 0x1 0x3
0x0 0x1 0x0 0x1 0x0 0x1 0x2 0x3 0x0 0x1 0x2 0x3
CPRCNT
0x0 0x1 0x2 0x3 0x0 0x1 0x2 0x0 0x1 0x2 0x0 0x1
CUPRCNT
CPRUPD 0x1 0x3
CUPRUPD 0x3 0x2
CTR 0x1 0x2
CUPR 0x3 0x2
Comparison Match
CMPM