Datasheet

5
6430FS–ATARM–10-Feb-12
SAM3U Series
3. Signal Description
Table 3-1 gives details on the signal names classified by peripheral.
Table 3-1. Signal Description List
Signal Name Function Type
Active
Level
Voltag e
Reference Comments
Power Supplies
VDDIO Peripherals I/O Lines Power Supply Power 1.62V to 3.6V
VDDIN Voltage Regulator Input Power 1.8V to 3.6V
VDDOUT Voltage Regulator Output Power 1.8V
VDDUTMII USB UTMI+ Interface Power Supply Power 3.0V to 3.6V
GNDUTMII USB UTMI+ Interface Ground Ground
VDDBU Backup I/O Lines Power Supply Power 1.62V to 3.6V
GNDBU Backup Ground Ground
VDDPLL
PLL A, UPLL and OSC 3-20 MHz Power Supply Power 1.62 V to 1.95V
GNDPLL PLL A, UPLL and OSC 3-20 MHz Ground Ground
VDDANA ADC Analog Power Supply Power 2.0V to 3.6V
GNDANA ADC Analog Ground Ground
VDDCORE
Core, Memories and Peripherals Chip Power
Supply
Power 1.62V to 1.95V
GND Ground Ground
Clocks, Oscillators and PLLs
XIN Main Oscillator Input Input VDDPLL
XOUT Main Oscillator Output Output
XIN32 Slow Clock Oscillator Input Input VDDBU
XOUT32 Slow Clock Oscillator Output Output
VBG Bias Voltage Reference Analog
PCK0 - PCK2 Programmable Clock Output Output VDDIO
Shutdown, Wakeup Logic
SHDN Shut-Down Control Output
VDDBU
push/pull
0: The device is in
backup mode
1: The device is running
(not in backup mode)
FWUP Force Wake-Up Input Input Low Needs external pull-up
Serial Wire/JTAG Debug Port (SWJ-DP)
TCK/SWCLK Test Clock/Serial Wire Clock Input
VDDIO
No pull-up resistor
TDI Test Data In Input No pull-up resistor
TDO/TRACESWO Test Data Out/Trace Asynchronous Data Out Output
(4)
TMS/SWDIO Test Mode Select/Serial Wire Input/Output Input No pull-up resistor
JTAGSEL JTAG Selection Input High VDDBU
Internal permanent
pull-down