Datasheet

31
11090BS–ATARM–22-Oct-13
SAM3S8/SD8 Summary
9.2 External Memories
The SAM3S8/SD8 features one External Bus Interface to provide an interface to a wide range of
external memories and to any parallel peripheral.
9.2.1 Static Memory Controller
• 16-Mbyte Address Space per Chip Select
• 8- bit Data Bus
• Word, Halfword, Byte Transfers
• Programmable Setup, Pulse And Hold Time for Read Signals per Chip Select
• Programmable Setup, Pulse And Hold Time for Write Signals per Chip Select
• Programmable Data Float Time per Chip Select
• External Wait Request
• Automatic Switch to Slow Clock Mode
• Asynchronous Read in Page Mode Supported: Page Size Ranges from 4 to 32 Bytes
• NAND Flash additional logic supporting NAND Flash with Multiplexed Data/Address buses
• Hardware Configurable number of chip selects from 1 to 4
• Programmable timing on a per chip select basis
10. System Controller
The System Controller is a set of peripherals, which allow handling of key elements of the sys-
tem, such as power, resets, clocks, time, interrupts, watchdog, etc...
See the system controller block diagram in Figure 10-1 on page 32.