Datasheet

46
11090BS–ATARM–22-Oct-13
SAM3S8/SD8 Summary
Interval Measurement
Pulse Generation
Delay Timing
Pulse Width Modulation
Up/down Capabilities
Each channel is user-configurable and contains:
Three external clock inputs
Five internal clock inputs
Two multi-purpose input/output signals
Two global registers that act on all three TC Channels
Quadrature decoder
Advanced line filtering
Position / revolution / speed
2-bit Gray Up/Down Counter for Stepper Motor
11.7 Pulse Width Modulation Controller (PWM)
One Four-channel 16-bit PWM Controller, 16-bit counter per channel
Common clock generator, providing Thirteen Different Clocks
A Modulo n counter providing eleven clocks
Two independent Linear Dividers working on modulo n counter outputs
High Frequency Asynchronous clocking mode
Independent channel programming
Independent Enable Disable Commands
Independent Clock Selection
Independent Period and Duty Cycle, with Double Buffering
Programmable selection of the output waveform polarity
Programmable center or left aligned output waveform
Independent Output Override for each channel
Independent complementary Outputs with 12-bit dead time generator for each
channel
Independent Enable Disable Commands
Independent Clock Selection
Independent Period and Duty Cycle, with Double Buffering
Synchronous Channel mode
Synchronous Channels share the same counter
Mode to update the synchronous channels registers after a programmable number
of periods
Connection to one PDC channel
Provides Buffer transfer without processor intervention, to update duty cycle of
synchronous channels
Two independent event lines which can send up to 4 triggers on ADC within a period