Datasheet

6
11090BS–ATARM–22-Oct-13
SAM3S8/SD8 Summary
Flash Memory
ERASE
Flash and NVM Configuration Bits Erase
Command
Input High VDDIO
Reset State:
- Erase Input
- Internal pull-down enabled
- Schmitt Trigger enabled
(1)
Reset/Test
NRST Synchronous Microcontroller Reset I/O Low
VDDIO
Permanent Internal
pull-up
TST Test Select Input
Permanent Internal
pull-down
Universal Asynchronous Receiver Transceiver - UARTx
URXDx UART Receive Data Input
UTXDx UART Transmit Data Output
PIO Controller - PIOA - PIOB - PIOC
PA0 - PA31 Parallel IO Controller A I/O
VDDIO
Reset State:
- PIO or System IOs
(2)
- Internal pull-up enabled
- Schmitt Trigger enabled
(1)
PB0 - PB14 Parallel IO Controller B I/O
PC0 - PC31 Parallel IO Controller C I/O
PIO Controller - Parallel Capture Mode
PIODC0-PIODC7 Parallel Capture Mode Data Input
VDDIOPIODCCLK Parallel Capture Mode Clock Input
PIODCEN1-2 Parallel Capture Mode Enable Input
External Bus Interface
D0 - D7 Data Bus I/O
A0 - A23 Address Bus Output
NWAIT External Wait Signal Input Low
Static Memory Controller - SMC
NCS0 - NCS3 Chip Select Lines Output Low
NRD Read Signal Output Low
NWE Write Enable Output Low
NAND Flash Logic
NANDOE NAND Flash Output Enable Output Low
NANDWE NAND Flash Write Enable Output Low
High Speed Multimedia Card Interface - HSMCI
MCCK Multimedia Card Clock I/O
MCCDA Multimedia Card Slot A Command I/O
MCDA0 - MCDA3 Multimedia Card Slot A Data I/O
Table 3-1. Signal Description List (Continued)
Signal Name Function Type
Active
Level
Voltage
reference Comments