Datasheet

48
11090BS–ATARM–22-Oct-13
SAM3S8/SD8 Summary
Single ended/differential conversion
Programmable gain: 1, 2, 4
11.11 Digital-to-Analog Converter (DAC)
Up to 2 channel 12-bit DAC
Up to 2 mega-samples conversion rate in single channel mode
Flexible conversion range
Multiple trigger sources for each channel
2 Sample/Hold (S/H) outputs
Built-in offset and gain calibration
Possible to drive output to ground
Possible to use as input to analog comparator or ADC (as an internal wire and without S/H
stage)
Two PDC channels
Power reduction mode
11.12 Static Memory Controller
16-Mbyte Address Space per Chip Select
8- bit Data Bus
Word, Halfword, Byte Transfers
Byte Write or Byte Select Lines
Programmable Setup, Pulse And Hold Time for Read Signals per Chip Select
Programmable Setup, Pulse And Hold Time for Write Signals per Chip Select
Programmable Data Float Time per Chip Select
Compliant with LCD Module
External Wait Request
Automatic Switch to Slow Clock Mode
Asynchronous Read in Page Mode Supported: Page Size Ranges from 4 to 32 Bytes
NAND Flash additional logic supporting NAND Flash with Multiplexed Data/Address buses
Hardware Configurable number of chip select from 1 to 4
Programmable timing on a per chip select basis
11.13 Analog Comparator
One analog comparator
High speed option vs. low-power option
170 µA/xx ns active current consumption/propagation delay
20 µA/xx ns active current consumption/propagation delay
Selectable input hysteresis
0,20mV,50mV
Minus input selection:
DAC outputs