Datasheet

45
11090BS–ATARM–22-Oct-13
SAM3S8/SD8 Summary
11.4 USART
Programmable Baud Rate Generator
5- to 9-bit full-duplex synchronous or asynchronous serial communications
1, 1.5 or 2 stop bits in Asynchronous Mode or 1 or 2 stop bits in Synchronous Mode
Parity generation and error detection
Framing error detection, overrun error detection
MSB- or LSB-first
Optional break generation and detection
By 8 or by-16 over-sampling receiver frequency
Hardware handshaking RTS-CTS
Receiver time-out and transmitter timeguard
Optional Multi-drop Mode with address generation and detection
Optional Manchester Encoding
Full modem line support on USART1 (DCD-DSR-DTR-RI)
RS485 with driver control signal
ISO7816, T=0orT=1Protocols for interfacing with smart cards
NACK handling, error counter with repetition and iteration limit
SPI Mode
Master or Slave
Serial Clock programmable Phase and Polarity
SPI Serial Clock (SCK) Frequency up to MCK/4
IrDA modulation and demodulation
Communication at up to 115.2 Kbps
Test Modes
Remote Loopback, Local Loopback, Automatic Echo
11.5 Synchronous Serial Controller (SSC)
Provides serial synchronous communication links used in audio and telecom applications
(with CODECs in Master or Slave Modes, I
2
S, TDM Buses, Magnetic Card Reader)
Contains an independent receiver and transmitter and a common clock divider
Offers configurable frame sync and data length
Receiver and transmitter can be programmed to start automatically or on detection of
different event on the frame sync signal
Receiver and transmitter include a data signal, a clock signal and a frame synchronization
signal
11.6 Timer Counter (TC)
Six 16-bit Timer Counter Channels
Wide range of functions including:
Frequency Measurement
Event Counting