Datasheet

3
11090BS–ATARM–22-Oct-13
SAM3S8/SD8 Summary
2. Block Diagram
Figure 2-1. SAM3S8/SD8 100-pin version Block Diagram
PLLA
System Controller
WDT
RTT
Osc 32 kHz
SUPC
RSTC
8 GPBREG
3-20 MHz
Osc
POR
RTC
RC 32 kHz
SM
RC Osc
12/8/4 MHz
I/D
S
MPU
N
V
I
C
3-layer AHB Bus Matrix Fmax 64 MHz
USART2
(SAM3SD8 Only)
ADC Ch.
PLLB
PMC
PIOA / PIOB / PIOC
PIO
External Bus
Interface
D[7:0]
PIODC[7:0]
A[0:23]
A21/NANDALE
A22/NANDCLE
NCS0
NCS1
NCS2
NCS3
NRD
NWE
NANDOE
NANDWE
NWAIT
High Speed MCI
DATRG
PDC
PDC
PDC
PDC
PDC
PDC
PDC
PDC
PDC
PDC
PDC
PDC
PDC
PDC
DAC0
DAC1
Timer Counter B
Timer Counter B
TC[3..5]
TC[0..2]
TIOA[3:5]
TIOB[3:5]
TCLK[3:5]
AD[0..14]
RXD1
TXD1
USART1
USART0
UART1
UART0
SCK1
RTS1
CTS1
DSR1
DTR1
RI1
DCD1
NAND Flash
Logic
TWCK0
TWD0
TWD1
URXD0
UTXD0
URXD1
UTXD1
RXD0
TXD0
SCK0
RTS0
CTS0
RXD2
TXD2
SCK2
RTS2
CTS2
TWCK1
ADVREF
TIOB[0:2]
TCLK[0:2]
PWMH[0:3]
PWML[0:3]
PWMFI0
ADTRG
TIOA[0:2]
TST
PCK0-PCK2
XIN
NRST
VDDCORE
XOUT
RTCOUT0
RTCOUT1
XIN32
XOUT32
ERASE
VDDPLL
VDDIO
12-bit DAC
Temp. Sensor
PWM
12-bit ADC
TWI0
TWI1
SPI
SSC
PIO
Static Memory
Controller
Analog
Comparator
CRC Unit
Peripheral
Bridge
2668
Bytes
FIFO
USB 2.0
Full
Speed
Transceiver
NPCS0
PIODCCLK
PIODCEN1
PIODCEN2
NPCS1
NPCS2
NPCS3
MISO
MOSI
SPCK
MCDA[0..3]
MCCDA
MCCK
TF
TK
TD
RD
RK
RF
DDP
DDM
ADVREF
ROM
16 KBytes
SRAM
64 KBytes
512 KBytes FLASH
SAM3S8 Single Bank
SAM3SD8 Dual Bank
Flash
Unique
Identifier
TDI
TDO
TMS/SWDIO
TCK/SWCLK
JTAGSEL
Voltage
Regulator
VDDIN
VDDOUT
Cortex M-3 Processor
Fmax 64 MHz
In-Circuit Emulator
JTAG & Serial Wire
24-Bit
SysTick Counter