Datasheet

34
6500AS–ATARM–11-Dec-09
SAM3S Summary
Chip Select, Write enable or Read enable Control Mode
Asynchronous read in Page Mode supported (4- up to 32-byte page size)
Multiple device adaptability
Control signals programmable setup, pulse and hold time for each Memory Bank
Multiple Wait State Management
Programmable Wait State Generation
External Wait Request
Programmable Data Float Time
Slow Clock mode supported
Additional Logic for NAND Flash