Datasheet

7
SAM3S [SUMMARY]
6500ES–ATARM–11-Feb-13
3. Signal Description
Table 3-1 gives details on the signal names classified by peripheral.
Table 3-1. Signal Description List
Signal Name Function Type
Active
Level
Voltage
reference Comments
Power Supplies
VDDIO
Peripherals I/O Lines and USB transceiver
Power Supply
Power 1.62V to 3.6V
VDDIN
Voltage Regulator Input, ADC, DAC and
Analog Comparator Power Supply
Power 1.8V to 3.6V
(4)
VDDOUT Voltage Regulator Output Power 1.8V Output
VDDPLL Oscillator and PLL Power Supply Power 1.62 V to 1.95V
VDDCORE
Power the core, the embedded memories
and the peripherals
Power
1.62V to 1.95V
GND Ground Ground
Clocks, Oscillators and PLLs
XIN Main Oscillator Input Input
VDDIO
Reset State:
- PIO Input
- Internal Pull-up disabled
- Schmitt Trigger enabled
(1)
XOUT Main Oscillator Output Output
XIN32 Slow Clock Oscillator Input Input
XOUT32 Slow Clock Oscillator Output Output
PCK0 - PCK2 Programmable Clock Output Output
Reset State:
- PIO Input
- Internal Pull-up enabled
- Schmitt Trigger enabled
(1)
Serial Wire/JTAG Debug Port - SWJ-DP
TCK/SWCLK Test Clock/Serial Wire Clock Input
VDDIO
Reset State:
- SWJ-DP Mode
- Internal pull-up disabled
(5)
- Schmitt Trigger enabled
(1)
TDI Test Data In Input
TDO/TRACESWO
Test Data Out / Trace Asynchronous Data
Out
Output
TMS/SWDIO Test Mode Select /Serial Wire Input/Output Input / I/O
JTAGSEL JTAG Selection Input High
Permanent Internal
pull-down
Flash Memory
ERASE
Flash and NVM Configuration Bits Erase
Command
Input High VDDIO
Reset State:
- Erase Input
- Internal pull-down enabled
- Schmitt Trigger enabled
(1)
Reset/Test
NRST Synchronous Microcontroller Reset I/O Low
VDDIO
Permanent Internal
pull-up
TST Test Select Input
Permanent Internal
pull-down