Datasheet

6
SAM3S [SUMMARY]
6500ES–ATARM–11-Feb-13
Figure 2-3. SAM3S 48-pin Version Block Diagram
TDI
TDO
TMS/SWDIO
TCK/SWCLK
JTAGSEL
I/D
S
Voltage
Regulator
VDDIN
VDDOUT
SPI
TC[0..2]
ADVREF
TIOA[0:2]
TIOB[0:2]
TCLK[0:2]
PDC
TWI0
PDC
TWCK0
TWD0
PWM
PDC
TF
TK
TD
RD
RK
RF
DDP
DDM
Transceiver
MPU
N
V
I
C
TWI1
PDC
TWCK1
TWD1
PWMH[0:3]
PWML[0:3]
PWMFI0
PDC
UART0
UART1
URXD0
UTXD0
URXD1
UTXD1
SSC
Peripheral
Bridge
PDC
PDC
2668
Bytes
FIFO
USB 2.0
Full
Speed
PDC
RXD0
TXD0
USART0
SCK0
RTS0
CTS0
PLLA
System Controller
WDT
RTT
OSC
32K
SUPC
RSTC
8 GPBREG
3-20 MHz
Osc.
POR
RTC
RC 32k
SM
RC
12/8/4 M
PLLB
PMC
PIOA / PIOB
JTAG & Serial Wire
Flash
Unique
Identifier
Analog
Comparator
CRC Unit
ADC
Temp Sensor
ADVREF
NPCS0
NPCS1
NPCS2
NPCS3
MISO
MOSI
SPCK
Cortex-M3 Processor
Fmax 64 MHz
Timer Counter A
ROM
16 KBytes
TST
XIN
XOUT
XIN32
XOUT32
ERASE
VDDIO
VDDCORE
VDDPLL
PCK0-PCK2
In-Circuit Emulator
24-Bit
SysTick Counter
FLASH
256 KBytes
128 KBytes
64 KBytes
SRAM
48 KBytes
32 KBytes
16 KBytes
AD[0..7]
ADTRG
4-layer AHB Bus Matrix Fmax 64 MHz
PDC
Temp. Sensor
ADC