Datasheet

59
SAM3S [SUMMARY]
6500ES–ATARM–11-Feb-13
Revision History
Doc. Rev Comments
Change
Request Ref.
6500ES
Section 1. “Features”updated, “Low Power Modes” , Sleep and Backup modes, down to 1.8 µA in
Backup mode
Figure 8-1, "SAM3S Product Mapping", SRAM associated 1 MByte bit band region mapping changed:
0x22000000 to 0x23FFFFFF.
Document format updated, subsequently pagination changed
Section 14. “Ordering Information” Introduced MRL B for SAM3S1 parts..
rfo
8545
6500DS
Replace all mention to 100-ball LFBGA into 100-ball TFBGA.
Add table note 5 in Table 3-1, “Signal Description List”.
Add MOSCRCEN bit details in Section 5.5.2 “Wait Mode”.
Section 9.1.3.9 “Fast Flash Programming Interface” updated.
Notes under Figure 5-1, "Single Supply" and Figure 5-2, "Core Externally Supplied" modified.
Cross-References (1) added for 64-pin packages in table Table 1-1, “Configuration Summary”.
Pin 22 value changed for PA23/PGMD11 in Table 4-1, “100-lead LQFP SAM3S4/2/1C Pinout”.
"High Frequency Asynchronous clocking mode" removed from Section 12.7 “Pulse Width Modulation
Controller (PWM)”
“Write Protected Registers” added in “Description” , in Peripherals list.
ADC column values updated in Table 1-1, “Configuration Summary”.
8044
7632
7639
7668-7901
7887
8033
8093
8095
8213
rfo
6500CS
Missing PGMD8 to 15 added to Table 4-1, “100-lead LQFP SAM3S4/2/1C Pinout” and Table 4-2,
“100-ball TFBGA SAM3S4/2/1C Pinout”.
Section 5.7 “Fast Startup” updated.
Typo fixed on back page: ‘techincal’ --> ‘technical’.
Typos fixed in Section 1. “Features”.
Missing title added to Table 14-1.
PLLA input frequency range updated in Section 10.5 “Clock Generator”.
A sentence completed in Section 5.5.2 “Wait Mode”.
Last sentence removed from Section 9.1.3.10 “SAM-BA
®
Boot”.
‘three GPNVM bits’ replaced by ‘two GPNVM bits’ in Section 9.1.3.11 “GPNVM Bits”.
Leftover sentence removed from Section 4.1 “SAM3S4/2/1C Package and Pinout”.
rfo
7536
7524
7494
7492
7428
7394
6500BS
“Packages” on page 2, package size or pitch updated.
Table 1-1, “Configuration Summary”, ADC column updated, footnote gives precision on reserved
channel.
Table 4-2, “100-ball TFBGA SAM3S4/2/1C Pinout”, pinout information is available.
Figure 5-1, "Single Supply",Figure 5-2, "Core Externally Supplied" , updated notes below figures.
Figure 5-2, "Core Externally Supplied", Figure 5-3, "Backup Battery", ADC, DAC, Analog Comparator
supply is 2.0V-3.6V.
Section 12.13 “Analog Comparator”, “Peripherals” on page 2, reference to “window function”
removed.
Section 9.1.3.8 “Unique Identifier”, Each device integrates its own 128-bit unique identifier.
7214
6981
7201
7243/rfo
7103
7307
6500AS First issue