Datasheet

5
SAM3S [SUMMARY]
6500ES–ATARM–11-Feb-13
Figure 2-2. SAM3S 64-pin Version Block Diagram
TDI
TDO
TMS/SWDIO
TCK/SWCLK
JTAGSEL
I/D
S
Voltage
Regulator
VDDIN
VDDOUT
SPI
TC[0..2]
ADVREF
TIOB[0:2]
TIOA[0:2]
TCLK[0:2]
PDC
TWI0
PDC
TWCK0
PWM
PDC
TF
TK
TD
RD
RK
RF
DDP
DDM
Transceiver
MPU
N
V
I
C
TWI1
PDC
TWD1
PWMH[0:3]
PWMFI0
PDC
UART0
UART1
URXD0
UTXD0
URXD1
UTXD1
SSC
Peripheral
Bridge
PDC
PDC
2668
Bytes
FIFO
USB 2.0
Full
Speed
PDC
RXD0
TXD0
USART0
SCK0
RTS0
CTS0
PLLA
TS T
PCK0-PCK2
System Controller
XIN
NRST
VDDCORE
XOUT
WDT
RTT
OSC 32K
XIN32
XOUT32
SUPC
RSTC
8 GPBREG
3-20 MHz
Osc.
POR
RTC
RC 32k
SM
RC
12/8/4 M
ERASE
VDDPLL
VDDIO
PLLB
PMC
PIOA / PIOB
JTAG & Serial Wire
Flash
Unique
Identifier
PIODCCLK
PIODCEN1
PIODCEN2
PIO
PDC
PIODC[7:0]
Analog
Comparator
CRC Unit
ADC
DAC
Temp Sensor
ADVREF
NPCS0
NPCS1
NPCS2
NPCS3
MISO
MOSI
SPCK
MCCK
MCCDA
MCDA[0..3]
High Speed MCI
Cortex-M3 Processor
Fmax 64 MHz
In-Circuit Emulator
Timer Counter A
ROM
16 KBytes
TWD0
TWCK1
PWML[0:3]
24-Bit
SysTick Counter
FLASH
256 KBytes
128 KBytes
64 KBytes
SRAM
48 KBytes
32 KBytes
16 KBytes
PDC
DAC1
DAC0
AD[0..9]
ADTRG
DATRG
PDC
RXD1
TXD1
USART1
SCK1
RTS1
CTS1
DSR1
DTR1
RI1
DCD1
4-layer AHB Bus Matrix Fmax 64 MHz
DAC
PDC
Temp. Sensor
ADC
PDC