Datasheet

46
SAM3S [SUMMARY]
6500ES–ATARM–11-Feb-13
z By 8 or by-16 over-sampling receiver frequency
z Hardware handshaking RTS-CTS
z Receiver time-out and transmitter timeguard
z Optional Multi-drop Mode with address generation and detection
z Optional Manchester Encoding
z Full modem line support on USART1 (DCD-DSR-DTR-RI)
z RS485 with driver control signal
z ISO7816, T = 0 or T = 1 Protocols for interfacing with smart cards
z NACK handling, error counter with repetition and iteration limit
z SPI Mode
z Master or Slave
z Serial Clock programmable Phase and Polarity
z SPI Serial Clock (SCK) Frequency up to MCK/4
z IrDA modulation and demodulation
z Communication at up to 115.2 Kbps
z Test Modes
z Remote Loopback, Local Loopback, Automatic Echo
12.5 Synchronous Serial Controller (SSC)
z Provides serial synchronous communication links used in audio and telecom applications (with CODECs in Master
or Slave Modes, I
2
S, TDM Buses, Magnetic Card Reader)
z Contains an independent receiver and transmitter and a common clock divider
z Offers configurable frame sync and data length
z Receiver and transmitter can be programmed to start automatically or on detection of different event on the frame
sync signal
z Receiver and transmitter include a data signal, a clock signal and a frame synchronization signal
12.6 Timer Counter (TC)
z Six 16-bit Timer Counter Channels
z Wide range of functions including:
z Frequency Measurement
z Event Counting
z Interval Measurement
z Pulse Generation
z Delay Timing
z Pulse Width Modulation
z Up/down Capabilities
z Each channel is user-configurable and contains:
z Three external clock inputs
z Five internal clock inputs
z Two multi-purpose input/output signals
z Two global registers that act on all three TC Channels
z Quadrature decoder
z Advanced line filtering
z Position / revolution / speed
z 2-bit Gray Up/Down Counter for Stepper Motor