Datasheet

SAM3S [SUMMARY]

6500ES–ATARM–11-Feb-13

10.14 UART

z Two-pin UART

z Implemented features are 100% compatible with the standard Atmel USART

z Independent receiver and transmitter with a common programmable Baud Rate Generator

z Even, Odd, Mark or Space Parity Generation

z Parity, Framing and Overrun Error Detection

z Automatic Echo, Local Loopback and Remote Loopback Channel Modes

z Support for two PDC channels with connection to receiver and transmitter

10.15 PIO Controllers

z 3 PIO Controllers, PIOA, PIOB and PIOC (100-pin version only) controlling a maximum of 79 I/O Lines

z Fully programmable through Set/Clear Registers

z Multiplexing of four peripheral functions per I/O Line

z For each I/O Line (whether assigned to a peripheral or used as general purpose I/O)

z Input change, rising edge, falling edge, low level and level interrupt

z Debouncing and Glitch filter

z Multi-drive option enables driving in open drain

z Programmable pull-up or pull-down on each I/O line

z Pin data status register, supplies visibility of the level on the pin at any time

z Synchronous output, provides Set and Clear of several I/O lines in a single write

Table 10-2. PIO available according to pin count

Version 48 pin 64 pin 100 pin

PIOA 21 32 32

PIOB 13 15 15

PIOC --32