Datasheet

37
SAM3S [SUMMARY]
6500ES–ATARM–11-Feb-13
z independent peripheral clocks, typically at the frequency of MCK
z three programmable clock outputs: PCK0, PCK1 and PCK2
The Supply Controller selects between the 32 kHz RC oscillator or the crystal oscillator. The unused oscillator is disabled
automatically so that power consumption is optimized.
By default, at startup the chip runs out of the Master Clock using the fast RC oscillator running at 4 MHz.
The user can trim the 8 and 12 MHz RC Oscillator frequency by software.
Figure 10-3. SAM3S Power Management Controller Block Diagram
The SysTick calibration value is fixed at 8000 which allows the generation of a time base of 1 ms with SystTick clock at 8
MHz (max HCLK/8 = 64 MHz/8).
10.7 Watchdog Timer
z 16-bit key-protected only-once-Programmable Counter
z Windowed, prevents the processor to be in a dead-lock on the watchdog access.
10.8 SysTick Timer
z 24-bit down counter
z Self-reload capability
z Flexible System timer
MCK
periph_clk[..]
int
SLCK
MAINCK
PLLACK
Prescaler
/1,/2,/4,...,/64
HCK
Processor
Clock
Controller
Sleep Mode
Master Clock Controller
Peripherals
Clock Controller
ON/OFF
USB Clock Controller
SLCK
MAINCK
PLLACK
Prescaler
/1,/2,/4,...,/64
Programmable Clock Controller
PLLBCK
pck[..]
PLLBCK
PLLBCK
UDPCK
ON/OFF
ON/OFF
FCLK
SystTick
Divider
/8