Datasheet
20
SAM3S [SUMMARY]
6500ES–ATARM–11-Feb-13
5.4 Active Mode
Active mode is the normal running mode with the core clock running from the fast RC oscillator, the main crystal oscillator
or the PLLA. The power management controller can be used to adapt the frequency and to disable the peripheral clocks.
5.5 Low Power Modes
The various low power modes of the SAM3S are described below:
5.5.1 Backup Mode
The purpose of backup mode is to achieve the lowest power consumption possible in a system which is performing
periodic wake-ups to perform tasks but not requiring fast startup time (<0.1ms). Total current consumption is 3 μA typical.
The Supply Controller, zero-power power-on reset, RTT, RTC, Backup registers and 32 kHz oscillator (RC or crystal
oscillator selected by software in the Supply Controller) are running. The regulator and the core supply are off.
Backup mode is based on the Cortex-M3 deepsleep mode with the voltage regulator disabled.
The SAM3S can be awakened from this mode through WUP0-15 pins, the supply monitor (SM), the RTT or RTC wake-
up event.
Backup mode is entered by using WFE instructions with the SLEEPDEEP bit in the System Control Register of the
Cortex-M3 set to 1. (See the Power management description in The ARM Cortex M3 Processor section of the
product datasheet).
Exit from Backup mode happens if one of the following enable wake up events occurs:
• WKUPEN0-15 pins (level transition, configurable debouncing)
• Supply Monitor alarm
• RTC alarm
• RTT alarm
5.5.2 Wait Mode
The purpose of the wait mode is to achieve very low power consumption while maintaining the whole device in a
powered state for a startup time of less than 10 µs. Current Consumption in Wait mode is typically 15 µA (total cur-
rent consumption) if the internal voltage regulator is used or 8 µA if an external regulator is used.
In this mode, the clocks of the core, peripherals and memories are stopped. However, the core, peripherals and
memories power supplies are still powered. From this mode, a fast start up is available.
This mode is entered via Wait for Event (WFE) instructions with LPM = 1 (Low Power Mode bit in PMC_FSMR).
The Cortex-M3 is able to handle external events or internal events in order to wake-up the core (WFE). This is
done by configuring the external lines WUP0-15 as fast startup wake-up pins (refer to Section 5.7 “Fast Startup”).
RTC or RTT Alarm and USB wake-up events can be used to wake up the CPU (exit from WFE).
Entering Wait Mode:
• Select the 4/8/12 MHz fast RC oscillator as Main Clock
• Set the LPM bit in the PMC Fast Startup Mode Register (PMC_FSMR)
• Execute the Wait-For-Event (WFE) instruction of the processor
Note: Internal Main clock resynchronization cycles are necessary between the writing of MOSCRCEN bit and the
effective entry in Wait mode. Depending on the user application, Waiting for MOSCRCEN bit to be cleared is
recommended to ensure that the core will not execute undesired instructions.
The bit MOSCRCEN should be automatically set to '0'. So you have to add after this instruction the following: while
(MOSCRCEN ==0); so that you are sure to stay in the loop until you awake from the wait mode. In that case you are sure
the core will not continue to fetch the code but once you have exited the wait mode (in that case MOSCRCEN will be
automatically set to '1').