Datasheet

10
SAM3S [SUMMARY]
6500ES–ATARM–11-Feb-13
Notes: 1. Schmitt Triggers can be disabled through PIO registers.
2. Some PIO lines are shared with System IOs.
3. Refer to the USB sub section in the product Electrical Characteristics Section for Pull-down value in USB Mode.
4. See Section 5.3 “Typical Powering Schematics” for restriction on voltage range of Analog Cells.
5. TDO pin is set in input mode when the Cortex-M3 Core is not in debug mode. Thus the internal pull-up corresponding
to this PIO line must be enabled to avoid current consumption due to floating input.
Fast Flash Programming Interface - FFPI
PGMEN0-PGMEN2 Programming Enabling Input VDDIO
PGMM0-PGMM3 Programming Mode Input
VDDIO
PGMD0-PGMD15 Programming Data I/O
PGMRDY Programming Ready Output High
PGMNVALID Data Direction Output Low
PGMNOE Programming Read Input Low
PGMCK Programming Clock Input
PGMNCMD Programming Command Input Low
USB Full Speed Device
DDM USB Full Speed Data -
Analog,
Digital
VDDIO
Reset State:
- USB Mode
- Internal Pull-down
(3)
DDP USB Full Speed Data +
Table 3-1. Signal Description List (Continued)
Signal Name Function Type
Active
Level
Voltage
reference Comments