Datasheet

8
11011AS–ATARM–04-Oct-10
SAM3N Summary
Notes: 1. Schmitt Triggers can be disabled through PIO registers.
2. Some PIO lines are shared with System IOs.
3. See Section 5.3 “Typical Powering Schematics” for restriction on voltage range of Analog Cells.
Serial Peripheral Interface - SPI
MISO Master In Slave Out I/O
MOSI Master Out Slave In I/O
SPCK SPI Serial Clock I/O
SPI_NPCS0 SPI Peripheral Chip Select 0 I/O Low
SPI_NPCS1 -
SPI_NPCS3
SPI Peripheral Chip Select Output Low
Two-Wire Interface- TWIx
TWDx TWIx Two-wire Serial Data I/O
TWCKx TWIx Two-wire Serial Clock I/O
Analog
ADVREF ADC and DAC Reference Analog
10-bit Analog-to-Digital Converter - ADC
AD0 - AD15 Analog Inputs Analog
ADTRG ADC Trigger Input VDDIO
Digital-to-Analog Converter Controller- DACC
DAC0 DACC channel analog output Analog
DATRG DACC Trigger Input VDDIO
Fast Flash Programming Interface
PGMEN0-PGMEN2 Programming Enabling Input
VDDIO
PGMM0-PGMM3 Programming Mode Input
PGMD0-PGMD15 Programming Data I/O
PGMRDY Programming Ready Output High
PGMNVALID Data Direction Output Low
PGMNOE Programming Read Input Low
PGMCK Programming Clock Input
PGMNCMD Programming Command Input Low
Table 3-1. Signal Description List (Continued)
Signal Name Function Type
Active
Level
Voltage
Reference Comments