Datasheet

7
11011AS–ATARM–04-Oct-10
SAM3N Summary
Flash Memory
ERASE
Flash and NVM Configuration Bits Erase
Command
Input High VDDIO
Reset State:
- Erase Input
- Internal pull-down
enabled
- Schmitt Trigger
enabled
(1)
Reset/Test
NRST Microcontroller Reset I/O Low VDDIO
Permanent Internal
pull-up
TST Test Mode Select Input VDDIO
Permanent Internal
pull-down
Universal Asynchronous Receiver Transceiver - UARTx
URXDx UART Receive Data Input
UTXDx UART Transmit Data Output
PIO Controller - PIOA - PIOB - PIOC
PA0 - PA31 Parallel IO Controller A I/O
VDDIO
Reset State:
- PIO or System
IOs
(2)
- Internal pull-up
enabled
- Schmitt Trigger
enabled
(1)
PB0 - PB14 Parallel IO Controller B I/O
PC0 - PC31 Parallel IO Controller C I/O
Universal Synchronous Asynchronous Receiver Transmitter USARTx
SCKx USARTx Serial Clock I/O
TXDx USARTx Transmit Data I/O
RXDx USARTx Receive Data Input
RTSx USARTx Request To Send Output
CTSx USARTx Clear To Send Input
Timer/Counter - TC
TCLKx TC Channel x External Clock Input Input
TIOAx TC Channel x I/O Line A I/O
TIOBx TC Channel x I/O Line B I/O
Pulse Width Modulation Controller- PWMC
PWMx PWM Waveform Output for channel x Output
Table 3-1. Signal Description List (Continued)
Signal Name Function Type
Active
Level
Voltage
Reference Comments