Datasheet

87
11011B–ATARM–21-Feb-12
SAM3N
10.12 Memory access instructions
Table 10-17 shows the memory access instructions:
Table 10-17. Memory access instructions
Mnemonic Brief description See
ADR Load PC-relative address “ADR” on page 88
CLREX Clear Exclusive “CLREX” on page 102
LDM{mode} Load Multiple registers “LDM and STM” on page 97
LDR{type}
Load Register using immediate
offset
“LDR and STR, immediate offset” on
page 89
LDR{type} Load Register using register offset
“LDR and STR, register offset” on page
92
LDR{type}T
Load Register with unprivileged
access
“LDR and STR, unprivileged” on page 94
LDR
Load Register using PC-relative
address
“LDR, PC-relative” on page 95
LDREX{type} Load Register Exclusive “LDREX and STREX” on page 100
POP Pop registers from stack “PUSH and POP” on page 99
PUSH Push registers onto stack “PUSH and POP” on page 99
STM{mode} Store Multiple registers “LDM and STM” on page 97
STR{type}
Store Register using immediate
offset
“LDR and STR, immediate offset” on
page 89
STR{type} Store Register using register offset
“LDR and STR, register offset” on page
92
STR{type}T
Store Register with unprivileged
access
“LDR and STR, unprivileged” on page 94
STREX{type} Store Register Exclusive “LDREX and STREX” on page 100