Datasheet

79
11011B–ATARM–21-Feb-12
SAM3N
The CMSIS also provides a number of functions for accessing the special registers using MRS
and MSR instructions:
10.11 About the instruction descriptions
The following sections give more information about using the instructions:
• “Operands” on page 79
• “Restrictions when using PC or SP” on page 79
• “Flexible second operand” on page 80
• “Shift Operations” on page 81
• “Address alignment” on page 83
• “PC-relative expressions” on page 84
• “Conditional execution” on page 84
• “Instruction width selection” on page 86.
10.11.1 Operands
An instruction operand can be an ARM register, a constant, or another instruction-specific
parameter. Instructions act on the operands and often store the result in a destination register.
When there is a destination register in the instruction, it is usually specified before the operands.
Operands in some instructions are flexible in that they can either be a register or a constant. See
“Flexible second operand” .
10.11.2 Restrictions when using PC or SP
Many instructions have restrictions on whether you can use the Program Counter (PC) or Stack
Pointer (SP) for the operands or destination register. See instruction descriptions for more
information.
Table 10-15. CMSIS intrinsic functions to access the special registers
Special register Access CMSIS function
PRIMASK
Read uint32_t __get_PRIMASK (void)
Write void __set_PRIMASK (uint32_t value)
FAULTMASK
Read uint32_t __get_FAULTMASK (void)
Write void __set_FAULTMASK (uint32_t value)
BASEPRI
Read uint32_t __get_BASEPRI (void)
Write void __set_BASEPRI (uint32_t value)
CONTROL
Read uint32_t __get_CONTROL (void)
Write void __set_CONTROL (uint32_t value)
MSP
Read uint32_t __get_MSP (void)
Write void __set_MSP (uint32_t TopOfMainStack)
PSP
Read uint32_t __get_PSP (void)
Write void __set_PSP (uint32_t TopOfProcStack)