Datasheet

v
11011B–ATARM–21-Feb-12
SAM3N
24 Power Management Controller (PMC) ................................................ 341
24.1 Description .....................................................................................................341
24.2 Embedded Characteristics ............................................................................341
24.3 Block Diagram ...............................................................................................342
24.4 Master Clock Controller .................................................................................342
24.5 Processor Clock Controller ............................................................................343
24.6 SysTick Clock ................................................................................................343
24.7 Peripheral Clock Controller ............................................................................343
24.8 Free Running Processor Clock ......................................................................344
24.9 Programmable Clock Output Controller .........................................................344
24.10 Fast Startup ...................................................................................................345
24.11 Clock Failure Detector ...................................................................................346
24.12 Programming Sequence ................................................................................347
24.13 Clock Switching Details .................................................................................350
24.14 Write Protection Registers .............................................................................353
24.15 Power Management Controller (PMC) User Interface ..................................354
25 Chip Identifier (CHIPID) ....................................................................... 377
25.1 Description .....................................................................................................377
25.2 Chip Identifier (CHIPID) User Interface ........................................................378
26 Parallel Input/Output (PIO) Controller ................................................ 385
26.1 Description .....................................................................................................385
26.2 Embedded Characteristics ............................................................................385
26.3 Block Diagram ...............................................................................................386
26.4 Product Dependencies ..................................................................................387
26.5 Functional Description ...................................................................................388
26.6 I/O Lines Programming Example ...................................................................397
26.7 Parallel Input/Output Controller (PIO) User Interface ....................................398
27 Serial Peripheral Interface (SPI) ......................................................... 429
27.1 Description .....................................................................................................429
27.2 Embedded Characteristics ............................................................................429
27.3 Block Diagram ...............................................................................................430
27.4 Application Block Diagram .............................................................................430
27.5 Signal Description .........................................................................................431
27.6 Product Dependencies ..................................................................................431
27.7 Functional Description ...................................................................................432