Datasheet

ii
11011B–ATARM–21-Feb-12
SAM3N
9.2 APB/AHB Bridge ..............................................................................................35
9.3 Peripheral Signal Multiplexing on I/O Lines .....................................................35
10 ARM Cortex
®
M3 Processor .................................................................. 39
10.1 About this section ............................................................................................39
10.2 Embedded Characteristics ..............................................................................39
10.3 About the Cortex-M3 processor and core peripherals .....................................39
10.4 Programmers model ........................................................................................42
10.5 Memory model .................................................................................................55
10.6 Exception model ..............................................................................................63
10.7 Fault handling ..................................................................................................70
10.8 Power management ........................................................................................72
10.9 Instruction set summary ..................................................................................75
10.10 Intrinsic functions .............................................................................................78
10.11 About the instruction descriptions ....................................................................79
10.12 Memory access instructions ............................................................................87
10.13 General data processing instructions ............................................................103
10.14 Multiply and divide instructions ......................................................................119
10.15 Saturating instructions ...................................................................................123
10.16 Bitfield instructions .........................................................................................125
10.17 Branch and control instructions .....................................................................129
10.18 Miscellaneous instructions .............................................................................137
10.19 About the Cortex-M3 peripherals ...................................................................150
10.20 Nested Vectored Interrupt Controller .............................................................151
10.21 System control block .....................................................................................164
10.22 System timer, SysTick ...................................................................................191
10.23 Glossary ........................................................................................................196
11 Debug and Test Features .................................................................... 201
11.1 Description .....................................................................................................201
11.2 Embedded Characteristics ............................................................................201
11.3 Application Examples ....................................................................................202
11.4 Debug and Test Pin Description ....................................................................203
11.5 Functional Description ...................................................................................204
12 Reset Controller (RSTC) ...................................................................... 209
12.1 Description .....................................................................................................209
12.2 Embedded Characteristics ............................................................................209