Datasheet

i
11011B–ATARM–21-Feb-12
SAM3N
Table of Contents
Features ..................................................................................................... 1
1 SAM3N Description .................................................................................. 2
1.1 Configuration Summary .....................................................................................3
2 SAM3N Block Diagram ............................................................................ 4
3 Signal Description ................................................................................... 7
4 Package and Pinout ............................................................................... 10
4.1 SAM3N4/2/1/0/00C Package and Pinout ........................................................10
4.2 SAM3N4/2/1/0/00B Package and Pinout .........................................................13
4.3 SAM3N4/2/1/0/00A Package and Pinout .........................................................15
5 Power Considerations ........................................................................... 17
5.1 Power Supplies ................................................................................................17
5.2 Voltage Regulator ............................................................................................17
5.3 Typical Powering Schematics ..........................................................................17
5.4 Active Mode .....................................................................................................19
5.5 Low Power Modes ...........................................................................................19
5.6 Wake-up Sources ............................................................................................22
5.7 Fast Start-Up ...................................................................................................23
6 Input/Output Lines ................................................................................. 24
6.1 General Purpose I/O Lines ..............................................................................24
6.2 System I/O Lines .............................................................................................24
6.3 Test Pin ...........................................................................................................26
6.4 NRST Pin .........................................................................................................26
6.5 ERASE Pin ......................................................................................................26
7 Product Mapping .................................................................................... 27
7.1 Product Mapping .............................................................................................27
7.2 Embedded Memories ......................................................................................28
8 System Controller .................................................................................. 31
8.1 System Controller and Peripheral Mapping .....................................................33
8.2 Power-on-Reset, Brownout and Supply Monitor .............................................33
9 Peripherals ............................................................................................. 34
9.1 Peripheral Identifiers ........................................................................................34