Datasheet

721
11011B–ATARM–21-Feb-12
SAM3N
35.8 AC Characteristics
35.8.1 Master Clock Characteristics
35.8.2 I/O Characteristics
Criteria used to define the maximum frequency of the I/Os:
– output duty cycle (40%-60%)
– minimum output swing: 100 mV to VDDIO - 100 mV
– minimum output swing: 100 mV to VDDIO - 100 mV
– Addition of rising and falling time inferior to 75% of the period
Notes: 1. Pin Group 1 = PA14
2. Pin Group 2 = PA[0-13], PA[15-31], PB[0-14], PC[0-31]
Table 35-39. Master Clock Waveform Parameters
Symbol Parameter Conditions Min Max Units
1/(t
CPMCK
) Master Clock Frequency VDDCORE @ 1.62V 48 MHz
1/(t
CPMCK
) Master Clock Frequency VDDCORE @ 1.80V 62 MHz
Table 35-40. I/O Characteristics
Symbol Parameter Conditions Min Max Units
FreqMax1 Pin Group 1
(1)
Maximum output frequency
30 pF
V
DDIO
= 1.62V
V
DDIO
= 3.0V
45
62
MHz
45 pF
V
DDIO
= 1.62V
V
DDIO
= 3.0V
34
45
PulseminH
1
Pin Group 1
(1)
High Level Pulse Width
30 pF
V
DDIO
= 1.62V
V
DDIO
= 3.0V
11
7.7
ns
45 pF
V
DDIO
= 1.8V
V
DDIO
= 3.0V
14.7
11
PulseminL
1
Pin Group 1
(1)
Low Level Pulse Width
30 pF
V
DDIO
= 1.62V
V
DDIO
= 3.0V
11
7.7
ns
45 pF
V
DDIO
= 1.62V
V
DDIO
= 3.0V
14.7
11
FreqMax2 Pin Group 2
(2)
Maximum output frequency
Load: 25 pF
1.62V < VDDIO < 3.6V
35 MHz
PulseminH
2
Pin Group 2
(2)
High Level Pulse Width
Load: 25pF
1.62V < VDDIO < 3.6V
14.5 ns
PulseminL
2
Pin Group 2
(2)
Low Level Pulse Width
Load: 25pF
1.62V < VDDIO < 3.6V
14.5 ns