Datasheet

708
11011B–ATARM–21-Feb-12
SAM3N
35.3.3.2 Active Power Consumption with VDDCORE @ 1.62V
Table 35-15. Master Clock (MCK) and Core Clock variation (SAM3N4/2/1 MRL A)
Core Clock
/ MCK (MHz)
AMP1 (VDDOUT) Consumption Unit
Division Fibonacci
128-bit Flash access 64-bit Flash access 128-bit Flash access 64-bit Flash access
mA
62 25.7 22.6 27.05 25.2
48 20.8 18 23.2 20.4
32 14.1 12.5 17.2 15.75
24 11.1 9.25 13.65 13.2
12 5.6 5 7.9 7.36
8 4.2 3.6 5.9 5.41
4 3.55 2.4 3.6 5.5
2 1.84 1.3 1.88 1.3
1 1 0.72 1.2 0.72
Table 35-16. Master Clock (MCK) and Core Clock variation (SAM3N1 MRL B and SAM3N0/00 MRL B)
Core Clock
/ MCK (MHz)
AMP1 (VDDOUT) Consumption Unit
Division Fibonacci
128-bit Flash access 64-bit Flash access 128-bit Flash access 64-bit Flash access
mA
62 16.72 16.17 19.31 20.99
48 12.97 12.38 14.95 16.14
32 8.81 8.38 10.12 10.91
24 8.02 7.69 8.96 9.59
12 2.92 2.71 3.30 3.65
8 1.96 1.82 2.22 2.45
4 0.93 0.87 1.05 1.16
2 0.52 0.48 0.58 0.63
1 0.31 0.29 0.34 0.37
0.5 0.21 0.20 0.22 0.23
0.25 0.15 0.15 0.16 0.17
0.125 0.13 0.12 0.13 0.13
0.032 0.011 0.010 0.012 0.013