Datasheet

70
11011B–ATARM–21-Feb-12
SAM3N
If no higher priority exception occurs during exception entry, the processor starts executing the
exception handler and automatically changes the status of the corresponding pending interrupt
to active.
If another higher priority exception occurs during exception entry, the processor starts executing
the exception handler for this exception and does not change the pending status of the earlier
exception. This is the late arrival case.
10.6.7.6 Exception return
Exception return occurs when the processor is in Handler mode and executes one of the follow-
ing instructions to load the EXC_RETURN value into the PC:
•a
POP instruction that includes the PC
•a
BX instruction with any register.
•an
LDR or LDM instruction with the PC as the destination.
EXC_RETURN is the value loaded into the LR on exception entry. The exception mechanism
relies on this value to detect when the processor has completed an exception handler. The low-
est four bits of this value provide information on the return stack and processor mode. Table 10-
10 shows the EXC_RETURN[3:0] values with a description of the exception return behavior.
The processor sets EXC_RETURN bits[31:4] to
0xFFFFFFF . When this value is loaded into the PC
it indicates to the processor that the exception is complete, and the processor initiates the
exception return sequence.
10.7 Fault handling
Faults are a subset of the exceptions, see “Exception model” on page 63. The following gener-
ate a fault:
– a bus error on:
– an instruction fetch or vector table load
– a data access
Table 10-10. Exception return behavior
EXC_RETURN[3:0] Description
bXXX0 Reserved.
b0001
Return to Handler mode.
Exception return gets state from MSP.
Execution uses MSP after return.
b0011 Reserved.
b01X1 Reserved.
b1001
Return to Thread mode.
Exception return gets state from MSP.
Execution uses MSP after return.
b1101
Return to Thread mode.
Exception return gets state from PSP.
Execution uses PSP after return.
b1X11 Reserved.