Datasheet

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11011B–ATARM–21-Feb-12
SAM3N
10.4 Programmers model
This section describes the Cortex-M3 programmers model. In addition to the individual core reg-
ister descriptions, it contains information about the processor modes and privilege levels for
software execution and stacks.
10.4.1 Processor mode and privilege levels for software execution
The processor modes are:
10.4.1.1 Thread mode
Used to execute application software. The processor enters Thread mode when it comes out of
reset.
10.4.1.2 Handler mode
Used to handle exceptions. The processor returns to Thread mode when it has finished excep-
tion processing.
The privilege levels for software execution are:
10.4.1.3 Unprivileged
The software:
• has limited access to the MSR and MRS instructions, and cannot use the CPS instruction
• cannot access the system timer, NVIC, or system control block
• might have restricted access to memory or peripherals.
Unprivileged software executes at the unprivileged level.
10.4.1.4 Privileged
The software can use all the instructions and has access to all resources.
Privileged software executes at the privileged level.
In Thread mode, the CONTROL register controls whether software execution is privileged or
unprivileged, see “CONTROL register” on page 52. In Handler mode, software execution is
always privileged.
Only privileged software can write to the CONTROL register to change the privilege level for
software execution in Thread mode. Unprivileged software can use the SVC instruction to make
a supervisor call to transfer control to privileged software.
10.4.2 Stacks
The processor uses a full descending stack. This means the stack pointer indicates the last
stacked item on the stack memory. When the processor pushes a new item onto the stack, it
decrements the stack pointer and then writes the item to the new memory location. The proces-
sor implements two stacks, the main stack and the process stack, with independent copies of
the stack pointer, see “Stack Pointer” on page 44.