Datasheet

416
11011B–ATARM–21-Feb-12
SAM3N
416
11011B–ATARM–21-Feb-12
SAM3N
26.7.28 PIO Input Filter Slow Clock Status Register
Name: PIO_IFSCSR
Addresses: 0x400E0E88 (PIOA), 0x400E1088 (PIOB), 0x400E1288 (PIOC)
Access: Read-only
• P0-P31: Glitch or Debouncing Filter Selection Status
0 = The Glitch Filter is able to filter glitches with a duration < Tmck2.
1 = The Debouncing Filter is able to filter pulses with a duration < Tdiv_slclk/2.
26.7.29 PIO Slow Clock Divider Debouncing Register
Name: PIO_SCDR
Addresses: 0x400E0E8C (PIOA), 0x400E108C (PIOB), 0x400E128C (PIOC)
Access: Read-write
• DIVx: Slow Clock Divider Selection for Debouncing
Tdiv_slclk = 2*(DIV+1)*Tslow_clock.
31 30 29 28 27 26 25 24
P31 P30 P29 P28 P27 P26 P25 P24
23 22 21 20 19 18 17 16
P23 P22 P21 P20 P19 P18 P17 P16
15 14 13 12 11 10 9 8
P15 P14 P13 P12 P11 P10 P9 P8
76543210
P7 P6 P5 P4 P3 P2 P1 P0
31 30 29 28 27 26 25 24
--------
23 22 21 20 19 18 17 16
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15 14 13 12 11 10 9 8
- - DIV13 DIV12 DIV11 DIV10 DIV9 DIV8
76543210
DIV7 DIV6 DIV5 DIV4 DIV3 DIV2 DIV1 DIV0