Datasheet

396
11011B–ATARM–21-Feb-12
SAM3N
396
11011B–ATARM–21-Feb-12
SAM3N
26.5.13 Write Protection Registers
To prevent any single software error that may corrupt PIO behavior, certain address spaces can
be write-protected by setting the WPEN bit in the “PIO Write Protect Mode Register”
(PIO_WPMR).
If a write access to the protected registers is detected, then the WPVS flag in the PIO Write Pro-
tect Status Register (PIO_WPSR) is set and the field WPVSRC indicates in which register the
write access has been attempted.
The WPVS flag is reset by writing the PIO Write Protect Mode Register (PIO_WPMR) with the
appropriate access key, WPKEY.
The protected registers are:
• “PIO Enable Register” on page 401
• “PIO Disable Register” on page 401
• “PIO Output Enable Register” on page 402
• “PIO Output Disable Register” on page 403
• “PIO Input Filter Enable Register” on page 404
• “PIO Input Filter Disable Register” on page 404
• “PIO Multi-driver Enable Register” on page 409
• “PIO Multi-driver Disable Register” on page 410
• “PIO Pull Up Disable Register” on page 411
• “PIO Pull Up Enable Register” on page 411
• “PIO Peripheral ABCD Select Register 1” on page 413
• “PIO Peripheral ABCD Select Register 2” on page 414
• “PIO Output Write Enable Register” on page 419
• “PIO Output Write Disable Register” on page 419
• “PIO Pad Pull Down Disable Register” on page 417
• “PIO Pad Pull Down Status Register” on page 418