Datasheet

339
11011B–ATARM–21-Feb-12
SAM3N
Then, at the 16th falling edge of Slow Clock, the MAINFRDY bit in the Clock Generator Main
Clock Frequency Register (CKGR_MCFR) is set and the counter stops counting. Its value can
be read in the MAINF field of CKGR_MCFR and gives the number of Main Clock cycles during
16 periods of Slow Clock, so that the frequency of the 4/8/12 MHz Fast RC oscillator or 3 to 20
MHz Crystal or Ceramic Resonator-based oscillator can be determined.