Datasheet

303
11011B–ATARM–21-Feb-12
SAM3N
20. SAM3N Boot Program
20.1 Description
The SAM-BA
®
Boot Program integrates an array of programs permitting download and/or upload
into the different memories of the product.
20.2 Hardware and Software Constraints
• SAM-BA Boot uses the first 2048 bytes of the SRAM for variables and stacks. The remaining
available size can be used for user's code.
• UART0 requirements: None
20.3 Flow Diagram
The Boot Program implements the algorithm in Figure 20-1.
Figure 20-1. Boot Program Algorithm Flow Diagram
The SAM-BA Boot program uses the internal 12 MHz RC oscillator as source clock for PLL. The
MCK runs from PLL divided by 2. The core runs at 48 MHz.
20.4 Device Initialization
Initialization follows the steps described below:
1. Stack setup
2. Setup the Embedded Flash Controller
3. Switch on internal 12 MHz RC oscillator
4. Configure PLL to run at 96 MHz
5. Switch MCK to run on PLL divided by 2
6. Configure UART0
7. Disable Watchdog
8. Wait for a character on UART0
9. Jump to SAM-BA monitor (see Section 20.5 ”SAM-BA Monitor”)
Table 20-1. Pins Driven during Boot Program Execution
Peripheral Pin PIO Line
UART0 URXD0 PA9
UART0 UTXD0 PA10
Device
Setup
Character # received
from UART0?
Run SAM-BA Monitor
Ye s
No