Datasheet

11011B–ATARM–21-Feb-12

SAM3N

10.21.15 System control block design hints and tips

Ensure software uses aligned accesses of the correct size to access the system control block

registers:

• except for the CFSR and SHPR1-SHPR3, it must use aligned word accesses

• for the CFSR and SHPR1-SHPR3 it can use byte or aligned halfword or word accesses.

The processor does not support unaligned accesses to system control block registers.

In a fault handler. to determine the true faulting address:

• Read and save the MMFAR or BFAR value.

• Read the MMARVALID bit in the MMFSR, or the BFARVALID bit in the BFSR. The MMFAR or

BFAR address is valid only if this bit is 1.

Software must follow this sequence because another higher priority exception might change the

MMFAR or BFAR value. For example, if a higher priority handler preempts the current fault han-

dler, the other fault might change the MMFAR or BFAR value.