Datasheet
47
11011B–ATARM–21-Feb-12
SAM3N
The PSR bit assignments are:
Access these registers individually or as a combination of any two or all three registers, using
the register name as an argument to the MSR or MRS instructions. For example:
• read all of the registers using PSR with the MRS instruction
• write to the APSR using APSR with the MSR instruction.
The PSR combinations and attributes are:
See the instruction descriptions “MRS” on page 143 and “MSR” on page 144 for more informa-
tion about how to access the program status registers.
10.4.3.6 Application Program Status Register
The APSR contains the current state of the condition flags from previous instruction executions.
See the register summary in Table 10-2 on page 44 for its attributes. The bit assignments are:
•N
Negative or less than flag:
0 = operation result was positive, zero, greater than, or equal
1 = operation result was negative or less than.
•Z
Zero flag:
0 = operation result was not zero
1 = operation result was zero.
31 30 29 28 27 26 25 24
N Z C V Q ICI/IT T
23 22 21 20 19 18 17 16
Reserved
15 14 13 12 11 10 9 8
ICI/IT Reserved
ISR_NUMBER
76543210
ISR_NUMBER
Table 10-3. PSR register combinations
Register Type Combination
PSR RW
(1), (2)
1. The processor ignores writes to the IPSR bits.
2. Reads of the EPSR bits return zero, and the proces-
sor ignores writes to the these bits.
APSR, EPSR, and IPSR
IEPSR RO EPSR and IPSR
IAPSR RW
(1)
APSR and IPSR
EAPSR RW
(2)
APSR and EPSR