Datasheet

11057BS–ATARM–13-Jul-12

SAM3X/A

11057BS–ATARM–13-Jul-12

SAM3X/A

• Automatic Window Comparison of Converted Values

• Write Protect Registers

12.11 Digital-to-Analog Converter (DAC)

• 2 channels, 12-bit DAC

• Up to 1 mega-sample conversion rate in single channel mode

• Flexible conversion range

• Multiple trigger sources for each channel

• Built-in offset and gain calibration

• Possibility to drive output to ground

• Possibility to use as input to analog comparator or ADC (as an internal wire and without S/H

stage)

• Two PDCA channels

• Power reduction mode

12.12 CAN Controller (CAN)

• Fully Compliant with CAN 2.0 Part A and 2.0 Part B

• Bit Rates up to 1Mbit/s

• 8 Object Oriented Mailboxes with the Following Properties:

– CAN Specification 2.0 Part A or 2.0 Part B Programmable for Each Message

– Object Configurable in Receive (with Overwrite or Not) or Transmit Modes

– Independent 29-bit Identifier and Mask Defined for Each Mailbox

– 32-bit Access to Data Registers for Each Mailbox Data Object

– Uses a CAN_SIZE_COUNTER-bit Timestamp on Receive and Transmit Messages

– Hardware Concatenation of ID Masked Bitfields To Speed Up Family ID Processing

• 16-bit Internal Timer for Timestamping and Network Synchronization

• Programmable Reception Buffer Length up to 8 Mailbox Objects

• Priority Management between Transmission Mailboxes

• Autobaud and Listening Mode

• Low Power Mode and Programmable Wake-up on Bus Activity or by the Application

• Data, Remote, Error and Overload Frame Handling

12.13 Ethernet MAC (EMAC)

• DMA Master on Receive and Transmit Channels

• Compatible with IEEE Standard 802.3

• 10 and 100 Mbit/s operation

• Full- and half-duplex operation

• Statistics Counter Registers

• MII (144-pin SAM3X)/RMII (all SAM3X) interface to the physical layer

• Interrupt generation to signal receive and transmit completion