Datasheet

62
11057BS–ATARM–13-Jul-12
SAM3X/A
62
11057BS–ATARM–13-Jul-12
SAM3X/A
12.7 Pulse Width Modulation Controller (PWM)
One Eight-channel (SAM3A and 144-pin SAM3X) or One Four-channel (100-pin SAM3X) 16-
bit PWM Controller, 16-bit counter per channel
Common clock generator, providing Thirteen Different Clocks
A Modulo n counter providing eleven clocks
Two independent Linear Dividers working on modulo n counter outputs
High Frequency Asynchronous clocking mode
Independent channel programming
Independent Enable Disable Commands
Independent Clock Selection
Independent Period and Duty Cycle, with Double Bufferization
Programmable selection of the output waveform polarity
Programmable center or left aligned output waveform
Independent Output Override for each channel
Independent complementary Outputs with 12-bit dead time generator for each
channel
Independent Enable Disable Commands
Independent Clock Selection
Independent Period and Duty Cycle, with Double Bufferization
Synchronous Channel mode
Synchronous Channels share the same counter
Mode to update the synchronous channels registers after a programmable number
of periods
Interfaced with Peripheral DMA (PDC) or with the DMA Controller (DMAC) Channels to
Reduce Processor Overhead
Two independent event lines which can send up to 4 triggers on ADC within a period
Three programmable external (PWMFIx pins) and three internal (from ADC, PMC controller
and Timer 0) Fault Inputs providing an asynchronous protection of outputs without MCU
intervention
Stepper motor control (2 Channels)
12.8 High Speed Multimedia Card Interface (HSMCI)
Compatibility with MultiMedia Card Specification Version 4.3
Compatibility with SD Memory Card Specification Version 2.0
Compatibility with SDIO Specification Version V2.0
Compatibility with CE-ATA Specification 1.1
Cards clock rate up to Master Clock divided by 2
Boot Operation Mode support
High Speed mode support
Embedded power management to slow down clock rate when not used
Supports 2 Multiplexed Slot(s)