Datasheet

42
11057BS–ATARM–13-Jul-12
SAM3X/A
42
11057BS–ATARM–13-Jul-12
SAM3X/A
9.2 External Memories
The 144-pin SAM3X features one External Memory Bus to offer interface to a wide range of
external memories and to any parallel peripheral.
9.2.1 External Memory Bus
Integrates Four External Memory Controllers:
Static Memory Controller
NAND Flash Controller
SLC NAND Flash ECC Controller
Up to 24-bit Address Bus (up to 16 MBytes linear per chip select)
Up to 8 chip selects, Configurable Assignment
9.2.2 Static Memory Controller
8- or 16-bit Data Bus
Multiple Access Modes supported
Byte Write or Byte Select Lines
Asynchronous read in Page Mode supported (4- up to 32-byte page size)
Multiple device adaptability
Control signals programmable setup, pulse and hold time for each Memory Bank
Multiple Wait State Management
Programmable Wait State Generation
External Wait Request
Programmable Data Float Time
Slow Clock mode supported
9.2.3 NAND Flash Controller
Handles automatic Read/write transfer through 4224 bytes SRAM buffer
DMA support
Supports SLC NAND Flash technology
Programmable timing on a per chip select basis
Programmable Flash Data width 8-bit or 16-bit
9.2.4 NAND Flash Error Corrected Code Controller
Integrated in the NAND Flash Controller
Single bit error correction and 2-bit Random detection.
Automatic Hamming Code Calculation while writing
ECC value available in a register
Automatic Hamming Code Calculation while reading
Error Report, including error flag, correctable error flag and word address being
detected erroneous
Support 8- or 16-bit NAND Flash devices with 512-, 1024-, 2048- or 4096-byte
pages