Datasheet

36
11057BS–ATARM–13-Jul-12
SAM3X/A
36
11057BS–ATARM–13-Jul-12
SAM3X/A
7.8 Debug and Test Features
• Debug access to all memory and registers in the system, including Cortex-M3 register bank
when the core is running, halted, or held in reset
• Serial Wire Debug Port (SW-DP) and Serial Wire JTAG Debug Port (SWJ-DP) debug access
• Flash Patch and Breakpoint (FPB) unit for implementing break points and code patches
• Data Watchpoint and Trace (DWT) unit for implementing watch points, data tracing, and
system profiling
• Instrumentation Trace Macrocell (ITM) for support of printf style debugging
•IEEE
®
1149.1 JTAG Boundary-scan on all digital pins