Datasheet
Table Of Contents
- Features
- Pin Configurations
- Overview
- Resources
- Data Retention
- About Code Examples
- Atmel AVR CPU Core
- AVR ATmega8 Memories
- System Clock and Clock Options
- Power Management and Sleep Modes
- System Control and Reset
- Interrupts
- I/O Ports
- Introduction
- Ports as General Digital I/O
- Alternate Port Functions
- Register Description for I/O Ports
- The Port B Data Register – PORTB
- The Port B Data Direction Register – DDRB
- The Port B Input Pins Address – PINB
- The Port C Data Register – PORTC
- The Port C Data Direction Register – DDRC
- The Port C Input Pins Address – PINC
- The Port D Data Register – PORTD
- The Port D Data Direction Register – DDRD
- The Port D Input Pins Address – PIND
- External Interrupts
- 8-bit Timer/Counter0
- Timer/Counter0 and Timer/Counter1 Prescalers
- 16-bit Timer/Counter1
- Overview
- Accessing 16-bit Registers
- Timer/Counter Clock Sources
- Counter Unit
- Input Capture Unit
- Output Compare Units
- Compare Match Output Unit
- Modes of Operation
- Timer/Counter Timing Diagrams
- 16-bit Timer/Counter Register Description
- Timer/Counter 1 Control Register A – TCCR1A
- Timer/Counter 1 Control Register B – TCCR1B
- Timer/Counter 1 – TCNT1H and TCNT1L
- Output Compare Register 1 A – OCR1AH and OCR1AL
- Output Compare Register 1 B – OCR1BH and OCR1BL
- Input Capture Register 1 – ICR1H and ICR1L
- Timer/Counter Interrupt Mask Register – TIMSK(1)
- Timer/Counter Interrupt Flag Register – TIFR(1)
- 8-bit Timer/Counter2 with PWM and Asynchronous Operation
- Serial Peripheral Interface – SPI
- USART
- Two-wire Serial Interface
- Analog Comparator
- Analog-to- Digital Converter
- Boot Loader Support – Read- While-Write Self- Programming
- Boot Loader Features
- Application and Boot Loader Flash Sections
- Read-While-Write and No Read- While-Write Flash Sections
- Boot Loader Lock Bits
- Entering the Boot Loader Program
- Addressing the Flash During Self- Programming
- Self-Programming the Flash
- Performing Page Erase by SPM
- Filling the Temporary Buffer (Page Loading)
- Performing a Page Write
- Using the SPM Interrupt
- Consideration While Updating BLS
- Prevent Reading the RWW Section During Self-Programming
- Setting the Boot Loader Lock Bits by SPM
- EEPROM Write Prevents Writing to SPMCR
- Reading the Fuse and Lock Bits from Software
- Preventing Flash Corruption
- Programming Time for Flash when using SPM
- Simple Assembly Code Example for a Boot Loader
- ATmega8 Boot Loader Parameters
- Memory Programming
- Program And Data Memory Lock Bits
- Fuse Bits
- Signature Bytes
- Calibration Byte
- Page Size
- Parallel Programming Parameters, Pin Mapping, and Commands
- Parallel Programming
- Enter Programming Mode
- Considerations for Efficient Programming
- Chip Erase
- Programming the Flash
- Programming the EEPROM
- Reading the Flash
- Reading the EEPROM
- Programming the Fuse Low Bits
- Programming the Fuse High Bits
- Programming the Lock Bits
- Reading the Fuse and Lock Bits
- Reading the Signature Bytes
- Reading the Calibration Byte
- Parallel Programming Characteristics
- Serial Downloading
- Serial Programming Pin Mapping
- Electrical Characteristics – TA = -40°C to 85°C
- Electrical Characteristics – TA = -40°C to 105°C
- ATmega8 Typical Characteristics – TA = -40°C to 85°C
- Active Supply Current
- Idle Supply Current
- Power-down Supply Current
- Power-save Supply Current
- Standby Supply Current
- Pin Pull-up
- Pin Driver Strength
- Pin Thresholds and Hysteresis
- Bod Thresholds and Analog Comparator Offset
- Internal Oscillator Speed
- Current Consumption of Peripheral Units
- Current Consumption in Reset and Reset Pulsewidth
- ATmega8 Typical Characteristics – TA = -40°C to 105°C
- Register Summary
- Instruction Set Summary
- Ordering Information
- Packaging Information
- Errata
- Datasheet Revision History
- Changes from Rev. 2486Z- 02/11 to Rev. 2486AA- 02/2013
- Changes from Rev. 2486Y- 10/10 to Rev. 2486Z- 02/11
- Changes from Rev. 2486X- 06/10 to Rev. 2486Y- 10/10
- Changes from Rev. 2486W- 02/10 to Rev. 2486X- 06/10
- Changes from Rev. 2486V- 05/09 to Rev. 2486W- 02/10
- Changes from Rev. 2486U- 08/08 to Rev. 2486V- 05/09
- Changes from Rev. 2486T- 05/08 to Rev. 2486U- 08/08
- Changes from Rev. 2486S- 08/07 to Rev. 2486T- 05/08
- Changes from Rev. 2486R- 07/07 to Rev. 2486S- 08/07
- Changes from Rev. 2486Q- 10/06 to Rev. 2486R- 07/07
- Changes from Rev. 2486P- 02/06 to Rev. 2486Q- 10/06
- Changes from Rev. 2486O-10/04 to Rev. 2486P- 02/06
- Changes from Rev. 2486N-09/04 to Rev. 2486O-10/04
- Changes from Rev. 2486M-12/03 to Rev. 2486N-09/04
- Changes from Rev. 2486L-10/03 to Rev. 2486M-12/03
- Changes from Rev. 2486K-08/03 to Rev. 2486L-10/03
- Changes from Rev. 2486J-02/03 to Rev. 2486K-08/03
- Changes from Rev. 2486I-12/02 to Rev. 2486J-02/03
- Changes from Rev. 2486H-09/02 to Rev. 2486I-12/02
- Changes from Rev. 2486G-09/02 to Rev. 2486H-09/02
- Changes from Rev. 2486F-07/02 to Rev. 2486G-09/02
- Changes from Rev. 2486E-06/02 to Rev. 2486F-07/02
- Changes from Rev. 2486D-03/02 to Rev. 2486E-06/02
- Changes from Rev. 2486C-03/02 to Rev. 2486D-03/02
- Changes from Rev. 2486B-12/01 to Rev. 2486C-03/02
- Table of Contents
221
2486AA–AVR–02/2013
ATmega8(L)
Parallel
Programming
Enter Programming
Mode
The following algorithm puts the device in Parallel Programming mode:
1. Apply 4.5V - 5.5V between V
CC
and GND, and wait at least 100µs
2. Set RESET
to “0” and toggle XTAL1 at least 6 times
3. Set the Prog_enable pins listed in Table 92 on page 220 to “0000” and wait at least
100ns
4. Apply 11.5V - 12.5V to RESET
. Any activity on Prog_enable pins within 100ns after +12V
has been applied to RESET
, will cause the device to fail entering Programming mode
Note, if the RESET
pin is disabled by programming the RSTDISBL Fuse, it may not be possible
to follow the proposed algorithm above. The same may apply when External Crystal or External
RC configuration is selected because it is not possible to apply qualified XTAL1 pulses. In such
cases, the following algorithm should be followed:
1. Set Prog_enable pins listed in Table 92 on page 220 to “0000”
2. Apply 4.5V - 5.5V between V
CC
and GND simultaneously as 11.5V - 12.5V is applied to
RESET
3. Wait 100ns
4. Re-program the fuses to ensure that External Clock is selected as clock source
(CKSEL3:0 = 0’b0000) and RESET
pin is activated (RSTDISBL unprogrammed). If Lock
Bits are programmed, a chip erase command must be executed before changing the
fuses
5. Exit Programming mode by power the device down or by bringing RESET
pin to 0’b0
6. Entering Programming mode with the original algorithm, as described above
Considerations for
Efficient Programming
The loaded command and address are retained in the device during programming. For efficient
programming, the following should be considered.
• The command needs only be loaded once when writing or reading multiple memory
locations
• Skip writing the data value 0xFF, that is the contents of the entire EEPROM (unless the
EESAVE Fuse is programmed) and Flash after a Chip Erase
• Address High byte needs only be loaded before programming or reading a new 256 word
window in Flash or 256 byte EEPROM. This consideration also applies to Signature bytes
reading
Chip Erase The Chip Erase will erase the Flash and EEPROM
(1)
memories plus Lock Bits. The Lock Bits are
not reset until the Program memory has been completely erased. The Fuse Bits are not
changed. A Chip Erase must be performed before the Flash and/or the EEPROM are
reprogrammed.
Note: 1. The EEPRPOM memory is preserved during chip erase if the EESAVE Fuse is programmed
Load Command “Chip Erase”
1. Set XA1, XA0 to “10”. This enables command loading
2. Set BS1 to “0”
3. Set DATA to “1000 0000”. This is the command for Chip Erase
4. Give XTAL1 a positive pulse. This loads the command
5. Give WR
a negative pulse. This starts the Chip Erase. RDY/BSY goes low
6. Wait until RDY/BSY
goes high before loading a new command