Datasheet

69
ATmega8A [DATASHEET]
8159E–AVR–02/2013
15.7 Register Description
15.7.1 TCCR0 – Timer/Counter Control Register
• Bit 2:0 – CS02:0: Clock Select
The three clock select bits select the clock source to be used by the Timer/Counter.
If external pin modes are used for the Timer/Counter0, transitions on the T0 pin will clock the counter even if the
pin is configured as an output. This feature allows software control of the counting.
15.7.2 TCNT0 – Timer/Counter Register
The Timer/Counter Register gives direct access, both for read and write operations, to the Timer/Counter unit 8-bit
counter.
15.7.3 TIMSK – Timer/Counter Interrupt Mask Register
• Bit 0 – TOIE0: Timer/Counter0 Overflow Interrupt Enable
When the TOIE0 bit is written to one, and the I-bit in the Status Register is set (one), the Timer/Counter0 Overflow
interrupt is enabled. The corresponding interrupt is executed if an overflow in Timer/Counter0 occurs, i.e., when the
TOV0 bit is set in the Timer/Counter Interrupt Flag Register – TIFR.
Bit 76543210
– – – – – CS02 CS01 CS00 TCCR0
Read/WriteRRRRRR/WR/WR/W
Initial Value00000000
Table 15-2. Clock Select Bit Description
CS02 CS01 CS00 Description
0 0 0 No clock source (Timer/Counter stopped).
001clk
I/O
/(No prescaling)
010clk
I/O
/8 (From prescaler)
011clk
I/O
/64 (From prescaler)
100clk
I/O
/256 (From prescaler)
101clk
I/O
/1024 (From prescaler)
1 1 0 External clock source on T0 pin. Clock on falling edge.
1 1 1 External clock source on T0 pin. Clock on rising edge.
Bit 76543210
TCNT0[7:0] TCNT0
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value00000000
Bit 76543210
OCIE2 TOIE2 TICIE1 OCIE1A OCIE1B TOIE1 – TOIE0 TIMSK
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value00000000