Datasheet

221
ATmega8A [DATASHEET]
8159E–AVR–02/2013
To program and verify the ATmega8A in the Serial Programming mode, the following sequence is recommended
(See four byte instruction formats in Table 25-16):
1. Power-up sequence:
Apply power between V
CC
and GND while RESET and SCK are set to “0”. In some systems, the program-
mer can not guarantee that SCK is held low during Power-up. In this case, RESET
must be given a
positive pulse of at least two CPU clock cycles duration after SCK has been set to “0”.
2. Wait for at least 20 ms and enable Serial Programming by sending the Programming Enable serial instruc-
tion to pin MOSI.
3. The Serial Programming instructions will not work if the communication is out of synchronization. When in
sync. the second byte (0x53), will echo back when issuing the third byte of the Programming Enable
instruction. Whether the echo is correct or not, all four bytes of the instruction must be transmitted. If the
0x53 did not echo back, give RESET
a positive pulse and issue a new Programming Enable command.
4. The Flash is programmed one page at a time. The page size is found in Table 25-5 on page 210. The
memory page is loaded one byte at a time by supplying the 5LSB of the address and data together with
the Load Program memory Page instruction. To ensure correct loading of the page, the data Low byte
must be loaded before data High byte is applied for a given address. The Program memory Page is stored
by loading the Write Program memory Page instruction with the 7 MSB of the address. If polling is not
used, the user must wait at least t
WD_FLASH
before issuing the next page. (See Table 25-15).
5. Note: If other commands than polling (read) are applied before any write operation (FLASH, EEPROM,
Lock Bits, Fuses) is completed, it may result in incorrect programming.
6. The EEPROM array is programmed one byte at a time by supplying the address and data together with
the appropriate Write instruction. An EEPROM memory location is first automatically erased before new
data is written. If polling is not used, the user must wait at least t
WD_EEPROM
before issuing the next byte.
(See Table 25-15 on page 222). In a chip erased device, no 0xFFs in the data file(s) need to be
programmed.
7. Any memory location can be verified by using the Read instruction which returns the content at the
selected address at serial output MISO.
8. At the end of the programming session, RESET
can be set high to commence normal operation.
9. Power-off sequence (if needed):
Set RESET
to “1”.
Tur n V
CC
power off
25.9.2 Data Polling Flash
When a page is being programmed into the Flash, reading an address location within the page being programmed
will give the value 0xFF. At the time the device is ready for a new page, the programmed value will read correctly.
This is used to determine when the next page can be written. Note that the entire page is written simultaneously
and any address within the page can be used for polling. Data polling of the Flash will not work for the value 0xFF,
so when programming this value, the user will have to wait for at least t
WD_FLASH
before programming the next
page. As a chip-erased device contains 0xFF in all locations, programming of addresses that are meant to contain
0xFF, can be skipped. See Table 97 for t
WD_FLASH
value.
25.9.3 Data Polling EEPROM
When a new byte has been written and is being programmed into EEPROM, reading the address location being
programmed will give the value 0xFF. At the time the device is ready for a new byte, the programmed value will
read correctly. This is used to determine when the next byte can be written. This will not work for the value 0xFF,
but the user should have the following in mind: As a chip-erased device contains 0xFF in all locations, program-
ming of addresses that are meant to contain 0xFF, can be skipped. This does not apply if the EEPROM is Re-