Datasheet

204
ATmega8A [DATASHEET]
8159E–AVR–02/2013
; SPM timed sequence
out SPMCR, spmcrval
spm
; restore SREG (to enable interrupts if originally enabled)
out SREG, temp2
ret
24.8.13 Boot Loader Parameters
In Table 24-6 through Table 24-8, the parameters used in the description of the self programming are given.
Note: The different BOOTSZ Fuse configurations are shown in Figure 24-2.
For details about these two section, see “NRWW – No Read-While-Write Section” on page 195 and “RWW – Read-
While-Write Section” on page 195
Table 24-6. Boot Size Configuration
BOOTSZ1 BOOTSZ0
Boot
Size Pages
Application
Flash
Section
Boot
Loader
Flash
Section
End
Application
Section
Boot Reset
Address
(Start Boot
Loader
Section)
11
128
words
4
0x000 -
0xF7F
0xF80 -
0xFFF
0xF7F 0xF80
10
256
words
8
0x000 -
0xEFF
0xF00 -
0xFFF
0xEFF 0xF00
01
512
words
16
0x000 -
0xDFF
0xE00 -
0xFFF
0xDFF 0xE00
00
1024
words
32
0x000 -
0xBFF
0xC00 -
0xFFF
0xBFF 0xC00
Table 24-7. Read-While-Write Limit
Section Pages Address
Read-While-Write section (RWW) 96 0x000 - 0xBFF
No Read-While-Write section (NRWW) 32 0xC00 - 0xFFF
Table 24-8. Explanation of Different Variables used in Figure 24-3 and the Mapping to the Z-pointer
Variable
Corresponding
Z-value
(1)
Description
PCMSB 11 Most significant bit in the Program Counter. (The
Program Counter is 12 bits PC[11:0])
PAGEMSB 4 Most significant bit which is used to address the
words within one page (32 words in a page requires
5 bits PC [4:0]).
ZPCMSB Z12 Bit in Z-register that is mapped to PCMSB. Because
Z0 is not used, the ZPCMSB equals PCMSB + 1.
ZPAGEMSB Z5 Bit in Z-register that is mapped to PAGEMSB.
Because Z0 is not used, the ZPAGEMSB equals
PAGEMSB + 1.
PCPAGE PC[11:5] Z12:Z6 Program counter page address: Page select, for
page erase and page write
PCWORD PC[4:0] Z5:Z1 Program counter word address: Word select, for
filling temporary buffer (must be zero during page
write operation)