Datasheet

125
ATmega8A [DATASHEET]
8159E–AVR–02/2013
The SPI Data Register is a Read/Write Register used for data transfer between the Register File and the SPI Shift
Register. Writing to the register initiates data transmission. Reading the register causes the Shift Register Receive
buffer to be read.
20. USART
20.1 Features
• Full Duplex Operation (Independent Serial Receive and Transmit Registers)
• Asynchronous or Synchronous Operation
• Master or Slave Clocked Synchronous Operation
• High Resolution Baud Rate Generator
• Supports Serial Frames with 5, 6, 7, 8, or 9 Databits and 1 or 2 Stop Bits
• Odd or Even Parity Generation and Parity Check Supported by Hardware
• Data OverRun Detection
• Framing Error Detection
• Noise Filtering Includes False Start Bit Detection and Digital Low Pass Filter
• Three Separate Interrupts on TX Complete, TX Data Register Empty and RX Complete
• Multi-processor Communication Mode
• Double Speed Asynchronous Communication Mode
20.2 Overview
The Universal Synchronous and Asynchronous serial Receiver and Transmitter (USART) is a highly-flexible serial
communication device. A simplified block diagram of the USART Transmitter is shown in Figure 20-1. CPU acces-
sible I/O Registers and I/O pins are shown in bold.