Datasheet

32.6 Page Size
Table 32-10. No. of Words in a Page and No. of Pages in the Flash
Device Flash Size Page Size PCWORD No. of
Pages
PCPAGE PCMSB
ATmega48PA 2K words (4 KB) 32 words PC[4:0] 64 PC[10:5] 10
ATmega88PA 4K words (8 KB) 32 words PC[4:0] 128 PC[11:5] 11
ATmega168PA 8K words
(16 KB)
64 words PC[5:0] 128 PC[12:6] 12
Table 32-11. No. of Words in a Page and No. of Pages in the EEPROM
Device EEPROM
Size
Page
Size
PCWORD No. of
Pages
PCPAGE EEAMSB
ATmega48PA 256 bytes 4 bytes EEA[1:0] 64 EEA[7:2] 7
ATmega88PA 512 bytes 4 bytes EEA[1:0] 128 EEA[8:2] 8
ATmega168PA 512 bytes 4 bytes EEA[1:0] 128 EEA[8:2] 8
32.7 Parallel Programming Parameters, Pin Mapping, and Commands
This section describes how to parallel program and verify Flash program memory, EEPROM data
memory, Memory Lock bits, and Fuse bits in the device. Pulses are assumed to be at least 250 ns unless
otherwise noted.
32.7.1 Signal Names
In this section, some pins of this device are referenced by signal names describing their functionality
during parallel programming. Refer to figure Parallel Programming and table Pin Name Mapping below.
Pins not described in the following table are referenced by pin names.
The XA1/XA0 pins determine the action executed when the XTAL1 pin is given a positive pulse. The bit
coding is shown in table XA1 and XA0 Coding below.
When pulsing WR or OE, the command loaded determines the action executed. The different commands
are shown in table Command Byte Bit Coding below.
ATmega48PA/88PA/168PA
Memory Programming (MEMPROG)
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40002011A-page 369