Datasheet

when the low byte (OCR1xL) is written to the lower eight bits, the high byte will be copied into the upper
8-bits of either the OCR1x buffer or OCR1x in the same system clock cycle.
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20.6 Accessing 16-bit Timer/Counter Registers
20.10.1 Force Output Compare
In non-PWM Waveform Generation modes, the match output of the comparator can be forced by writing a
one to the Force Output Compare (TCCR1C.FOC1x) bit. Forcing compare match will not set the OCF1x
Flag or reload/clear the timer, but the OC1x pin will be updated as if a real compare match had occurred
(the TCCR1C.COM1x[1:0] bits settings define whether the OC1x pin is set, cleared or toggled).
20.10.2 Compare Match Blocking by TCNT1 Write
All CPU writes to the TCNT1 register will block any compare match that occurs in the next timer clock
cycle, even when the timer is stopped. This feature allows OCR1x to be initialized to the same value as
TCNT1 without triggering an interrupt when the timer/counter clock is enabled.
20.10.3 Using the Output Compare Unit
Since writing TCNT1 in any mode of operation will block all compare matches for one timer clock cycle,
there are risks involved when changing TCNT1 when using any of the output compare channels,
independent of whether the timer/counter is running or not. If the value written to TCNT1 equals the
OCR1x value, the compare match will be missed, resulting in incorrect waveform generation. Do not write
the TCNT1 equal to TOP in PWM modes with variable TOP values. The compare match for the TOP will
be ignored and the counter will continue to 0xFFFF. Similarly, do not write the TCNT1 value equal to
BOTTOM when the counter is down counting.
The setup of the OC1x should be performed before setting the Data Direction register for the port pin to
output. The easiest way of setting the OC1x value is to use the Force Output Compare (FOC1x) strobe
bits in Normal mode. The OC1x register keeps its value even when changing between Waveform
Generation modes.
Be aware that the TCCR1A.COM1x[1:0] bits are not double buffered together with the compare value.
Changing the TCCR1A.COM1x[1:0] will take effect immediately.
20.11 Compare Match Output Unit
The Compare Output mode (TCCR1A.COM1x[1:0]) bits have two functions. The waveform generator
uses the TCCR1A.COM1x[1:0] bits for defining the Output Compare (OC1x) state at the next compare
match. Secondly the TCCR1A.COM1x[1:0] bits control the OC1x pin output source. The figure below
shows a simplified schematic of the logic affected by the TCCR1A.COM1x[1:0] bit setting. The I/O
registers, I/O bits, and I/O pins in the figure are shown in bold. Only the parts of the general I/O port
control registers (DDR and PORT) that are affected by the TCCR1A.COM1x[1:0] bits are shown. When
referring to the OC1x state, the reference is for the internal OC1x register, not the OC1x pin. If a System
Reset occurs, the OC1x register is reset to “0”.
ATmega48PA/88PA/168PA
16-bit Timer/Counter1 (TC1) with PWM
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Datasheet Complete
DS40002011A-page 171